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About high -speed PCB design impedance matching

About high -speed PCB design impedance matching

During the impedance matching, the load impedance is required to be equal to the characteristic impedance of the transmission line during energy transmission. At this time, the transmission will not be reflected, which indicates that all energy is absorbed by the load. Conversely, there is energy loss in transmission. In high -speed PCB design, the matching of impedance is related to the quality of the signal.

When does the PCB line need to be matched with impedance?

It does not mainly look at the frequency, but the key is to see the steep edge of the signal, that is, the rise / decrease time of the signal. It is generally believed that if the signal rises / decreases (at 10 % to 90 %) less than 6 times the wire delay, it is a high speed, which is high speed, which is a high -speed speed, which is a high -speed speed. Signals must pay attention to the problem of impedance matching. The general value of the wire delay is 150PS / Inch.

Feature impedance

During the transmission process of the signal, if there is a consistent signal transmission speed on the transmission line, and the capacitance of the unit length is the same, then the signal always sees completely consistent instant impedance during the transmission process. Because the impedance on the entire transmission line remains constant, we give a specific name to represent this feature or characteristic of a specific transmission line, which is called the feature impedance of the transmission line. Feature impedance refers to the value of instant impedance when the signal is transmitted along the transmission line. The feature impedance is related to the layer layer of the PCB wire, the material (dielectric constant) used in PCB, the width of the wiring, the distance between the wire and the plane, and has nothing to do with the length of the wiring. Feature impedance can be calculated using software. In high -speed PCB wiring, the line impedance of the digital signal is generally designed to 50 ohms, which is a approximate number. Generally, the coaxial cable baseband is 50 ohm, the frequency zone is 75 ohm, and the twisted (differential) is 100 ohm.

Common impedance matching methods

1. Line terminal matching

Under the condition of signal source impedance lower than the transmission line feature impedance, a resistor R is connected between the source end of the signal and the transmission line, so that the output impedance of the source end is matched with the characteristic impedance of the transmission line to suppress the signal returned from the load end. Cancel again.

Principles of matching resistance: The sum of the output impedance of the matching resistance and the output impedance of the drive is equal to the characteristic impedance of the transmission line. For common CMOS and TTL drives, its output impedance changes with the level of the signal. Therefore, for the TTL or CMOS circuit, it is impossible to have a very correct matching resistance and can only be considered. The signal network of the chain topology structure is not suitable for matching end -end matching. All loads must receive the end of the transmission line.

The series matching is the most commonly used terminal matching method. Its advantages are that the power consumption is small, it will not bring extra DC loads to the driver, and it will not introduce additional impedance between the signals and the ground, and only one resistance element is required. Common applications: impedance matching of general CMOS and TTL circuits. The USB signal is also sampled to match the impedance.

2. Parallel end -end matching

In the case of small signal source impedance, by increasing the parallel resistance, the load -end input impedance matches the characteristic impedance of the transmission line to eliminate the purpose of eliminating the load reflection. The implementation form is divided into two forms: single -resistance and dual resistance.

Principles of matching resistance: In the case where the input impedance of the chip is very high, for the form of a single resistance, the parallel resistance value of the load must be similar to the characteristics of the transmission line; for the dual -resistance form, each parallel resistance value value Twilight for transmission line feature impedance.

The advantage of the matching end matching is simple and easy to run. The obvious disadvantage is that it will bring DC power consumption: the DC power consumption of the single resistance method is closely related to the duty cycle of the signal; There are DC power consumption, but the current is half less than a single resistance.

Common applications: There are many high -speed signal applications.

(1) SSTL driver such as DDR and DDR2. The form of a single resistance is used to connect to VTT (usually half of iOVDD). Among them, the parallel and combined resistance of the DDR2 data signal is built into the chip.

(2) TMDS and other high -speed serial data interfaces. In the form of a single resistance, it is connected to IOVDD in parallel on the receiving device. The single -end impedance is 50 ohms (the differential pair is 100 ohm).


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